(China (Mainland))
Product Summary
The XC5202-5PC84C is a Field-Programmable Gate Array, which is engineered to deliver low cost. Building on experiences gained with three previous successful SRAM FPGA families, the XC5202-5PC84C brings a robust feature set to programmable logic design. The VersaBlock logic module, the VersaRing I/O interface, and a rich hierarchy of interconnect resources combine to enhance design flexibility and reduce time-to-market. Complete support for the XC5202-5PC84C is delivered through the familiar Xilinx software environment.
Parametrics
XC5202-5PC84C absolute maximum ratings: (1)Supply voltage relative to GND Commercial: 0℃ to 85℃ junction: 4.75 to 5.25 V; (2)Supply voltage relative to GND Industrial: -40℃ to 100℃ junction: 4.5 to 5.5 V; (3)High-level input voltage - TTL configuration: 2.0 to VCC V; (4)Low-level input voltage - TTL configuration: 0 to 0.8 V; (5)High-level input voltage - CMOS configuration: 70% to 100% VCC; (6)Low-level input voltage - CMOS configuration: 0 to 20% VCC; (7)Input signal transition time: 250 ns.
Features
XC5202-5PC84C features: (1)Low-cost, register/latch rich, SRAM based reprogrammable architecture:0.5mm three-layer metal CMOS process technology, 256 to 1936 logic cells (3,000 to 23,000 "gates"), Price competitive with Gate Arrays; (2)System Level Features: System performance beyond 50 MHz, 6 levels of interconnect hierarchy; (3)Versatile I/O and Packaging: Innovative VersaRing. I/O interface provides a high logic cell to I/O ratio, with up to 244 I/O signals, Programmable output slew-rate control maximizes performance and reduces noise.
Diagrams
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